Conventionally, because a CMOS solid-state image pickup element can be formed integrally with various integrated circuits on a substrate, various configurations related to the integrations have been proposed.
Of these proposals, U.S. Pat. No. 5,461,425, for example, discloses a configuration in which a one-bit analog-to-digital conversion circuit based on delta sigma modulation is provided for each pixel. In this configuration, pixels arranged in the form of a two-dimensional array are selected in each row and connected to an output signal line. Image pickup results as one-bit digital signals are output from the output signal line, and converted into eight-bit image data by a filter. The thus obtained image data is output by one system via a multiplexer. Thus, the configuration disclosed in U.S. Pat. No. 5,461,425 scans pixels in row units, and outputs image pickup results.
In addition, U.S. Pat. No. 6,229,133 discloses a configuration in which an integration type one-bit analog-to-digital conversion circuit is provided for each pixel, an image pickup result of each pixel is subjected to frequency conversion, and then the result is output. In this configuration, while electric charge resulting from photoelectric conversion is accumulated in a capacitor, a terminal voltage of the capacitor is compared with a reference voltage. On the basis of a result of the comparison, the terminal voltage of the capacitor is initialized, and an output signal of logic 1 is output. Thereby, in this configuration, frequency of output of logic 1 is increased with increase in amount of light incident on each pixel, whereby an image pickup result of each pixel is subjected to frequency conversion. This output signal of logic 1 is processed by a filter, and then image data is output.
Such a configuration in which an analog-to-digital conversion circuit is provided for each pixel can correspondingly simplify the configuration of a peripheral circuit of an image pickup element.
However, the configuration in which an analog-to-digital conversion circuit is thus provided for each pixel has a problem in that the area of each pixel which area is occupied on the light receiving surface of the image pickup element is decreased and thus sensitivity is lowered due to a decrease in so-called aperture ratio. In order to remedy this, pixel area needs to be increased. However, because the area of a pixel cell including an analog-to-digital conversion circuit is increased, it becomes difficult to increase the number of pixels. In order to maintain the aperture ratio, it is necessary to create analog-to-digital conversion circuits at a high density, and it becomes correspondingly difficult to manufacture the image pickup element.
In addition, the configuration disclosed in U.S. Pat. No. 5,461,425 scans pixels in row units and outputs image pickup results. When the number of pixels is increased, it becomes difficult to increase a sampling rate. Further, because filter processing is performed with a predetermined number of taps in a filter unit, it is difficult to ensure a desired frame rate. With the configuration disclosed in U.S. Pat. No. 6,229,133, a storage time required for the reference voltage to be reached is lengthened when an amount of incident light is reduced. It is therefore difficult to increase the frame rate.